Device Structure ( z) w6 W' i/ H6 D& u
◆ CMOS image sensor 0 P" [2 d2 \! t2 ]$ A0 o. Y
◆ Image size Diagonal 11.1 mm (Type 2/3) Approx. 5.07 M pixels All-pixel Diagonal 7.7 mm (Type 1/2.35) Approx. 2.11 M pixels 1080p-Full HD
/ l0 Z9 g, L, c( u2 }% p4 V◆ Total number of pixels 2464 (H) × 2066 (V) Approx. 5.09 M pixels
& q& N- Z9 |* R K- M+ I◆ Number of effective pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels
2 L1 h; `- L7 j' o* l: t◆ Number of active pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels 6 r: f6 T# J5 c5 r- @0 ?! V/ a
◆ Number of recommended recording pixels 2448 (H) × 2048 (V) Approx. 5.01 M pixels All-pixel 1920 (H) × 1080 (V) Approx. 2.07 M pixels 1080p-Full HD
$ _8 G9 B8 F% o( V◆ Unit cell size 3.45 µm (H) × 3.45 µm (V) 8 S: H, N4 s5 M+ {) H# B+ W; Q
◆ Optical black Horizontal (H) direction: Front 0 pixels, rear 0 pixels Vertical (V) direction: Front 10 pixels, rear 0 pixels
4 C& C! y( U' L& x& Q( ?) f◆ Substrate material Silicon
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% i( q |9 A4 o/ L/ k/ dFeatures . a2 [! J: `" @) U
◆ CMOS active pixel type dots J# k0 e7 z- m: Z* ^
◆ Built-in timing adjustment circuit, H/V driver and serial communication circuit ; t7 V2 n2 r6 K- R; M1 i6 ^
◆ Global shutter function
& ~- A' S2 E4 B0 M( r◆ Input frequency 37.125 MHz / 74.25 MHz / 54MHz 7 Q; z. \% `- _3 R8 t
◆ Number of recommended recording pixels: 2448 (H) × 2048 (V) approx. 5.01 M pixels 1 r9 s: |7 B/ ]# d" H/ K
Readout mode
# [. ^% w2 g( M2 z# QAll-pixel scan mode
5 C1 E- i+ _7 H( m9 a5 V' o1080p-Full HD readout mode
! {5 d& U; j* Y ^% x* f$ jVertical / Horizontal 1 / 2 Subsampling mode
+ @! _5 l! S3 d2 R( c! I! c8 j9 iVertical 2-pixel FD Binning mode ROI mode
6 K1 L6 E: R( I0 S# IVertical / Horizontal‐Normal / Inverted readout mode ( |( [& o) A Q4 U# t. o5 {# o
◆ Readout rate + T# S: R2 }! d
Maximum frame rate in ; e/ y0 `3 O) I: I) Y8 N
All-pixel scan mode: 8 bit 163.4 frame/s, 10 bit:144.7 frame/s, 12 bit:89.5 frame/s , F, e' u$ T$ w- X" B) f
◆ Variable-speed shutter function (resolution 1 H units)
! F: F; `: T7 u% ^4 i y" ~. t- v0 n◆ 8-bit / 10-bit / 12-bit A/D converter
& r+ l. g' o$ d: M8 ?8 h* [1 V b* L◆ CDS / PGA function 0 dB to 24 dB: Analog Gain (0.1 dB step) 24.1 dB to 48 dB: Analog Gain: 24 dB + Digital Gain: 0.1 dB to 24 dB (0.1 dB step) / m' J/ x6 I a
◆ I/O interface Low voltage LVDS (150 mVp-p) serial (4 ch / 8 ch / 16ch switching) DDR output
6 S* D; R, P2 _4 f' N1 k$ H◆ Recommended lens F number: 2.8 or more (Close side) 6 a/ `6 M7 G5 L3 `" l
◆ Recommended exit pupil distance: –100 mm to –∞6 S C* i% ]1 h! X+ ~, v
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