Device Structure
6 z1 |1 y- _* O o8 e; t◆ CMOS image sensor
- x) n2 y& @+ p* w- c1 E◆ Image size Diagonal 11.1 mm (Type 2/3) Approx. 5.07 M pixels All-pixel Diagonal 7.7 mm (Type 1/2.35) Approx. 2.11 M pixels 1080p-Full HD 6 f$ N/ W3 k' X6 E6 g3 h5 A6 @' d3 c
◆ Total number of pixels 2464 (H) × 2066 (V) Approx. 5.09 M pixels
) ^, @" k2 J* K, f◆ Number of effective pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels : m, D- B% m2 }) z$ e. u8 }9 {
◆ Number of active pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels 7 e; }" p- T! V
◆ Number of recommended recording pixels 2448 (H) × 2048 (V) Approx. 5.01 M pixels All-pixel 1920 (H) × 1080 (V) Approx. 2.07 M pixels 1080p-Full HD & w9 y: C, V1 V9 k
◆ Unit cell size 3.45 µm (H) × 3.45 µm (V) 6 Z o' d% `" K- p: U9 s+ M
◆ Optical black Horizontal (H) direction: Front 0 pixels, rear 0 pixels Vertical (V) direction: Front 10 pixels, rear 0 pixels
* f" Z# V5 s! k! P2 P◆ Substrate material Silicon3 z- G! ?/ F1 {; [6 u) n# t$ l
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Features
7 u$ S6 K1 W$ m2 m0 `0 L◆ CMOS active pixel type dots _2 x2 L( ~3 ^2 g0 W. R. ^3 x
◆ Built-in timing adjustment circuit, H/V driver and serial communication circuit 6 e5 c1 l( Y: t' U; ^6 T
◆ Global shutter function 8 G' u+ T3 p, f3 Y6 L7 x
◆ Input frequency 37.125 MHz / 74.25 MHz / 54MHz ' B0 H1 _; D4 _8 R$ M- F d2 |
◆ Number of recommended recording pixels: 2448 (H) × 2048 (V) approx. 5.01 M pixels
7 w; H; E6 V* I6 m1 S$ o# _3 L8 zReadout mode
R/ p9 | s8 LAll-pixel scan mode
, O+ {8 l ]0 g7 a K- T% f1080p-Full HD readout mode # {) k T/ S8 ?5 z/ W" Z8 q! T
Vertical / Horizontal 1 / 2 Subsampling mode # D' h1 V4 ^8 s6 C( Q
Vertical 2-pixel FD Binning mode ROI mode
2 ]3 ?. L# A7 E% ]! `' hVertical / Horizontal‐Normal / Inverted readout mode 0 b0 g, q5 i5 w$ x4 R
◆ Readout rate / r( a* Y3 v- W) R4 E9 u8 f
Maximum frame rate in $ s; u) `, K2 P" K! h
All-pixel scan mode: 8 bit 163.4 frame/s, 10 bit:144.7 frame/s, 12 bit:89.5 frame/s % h* M% G3 R2 s) G8 t* e R
◆ Variable-speed shutter function (resolution 1 H units) / u' @ I8 C0 _; c0 w, G
◆ 8-bit / 10-bit / 12-bit A/D converter
% j- d/ o8 f ?3 u5 @. f4 x1 A◆ CDS / PGA function 0 dB to 24 dB: Analog Gain (0.1 dB step) 24.1 dB to 48 dB: Analog Gain: 24 dB + Digital Gain: 0.1 dB to 24 dB (0.1 dB step)
& C2 t. K! j% D◆ I/O interface Low voltage LVDS (150 mVp-p) serial (4 ch / 8 ch / 16ch switching) DDR output $ {$ J) @. P6 f1 |/ A0 T7 @2 t- m
◆ Recommended lens F number: 2.8 or more (Close side)
" h; B, u" Y. V" m◆ Recommended exit pupil distance: –100 mm to –∞: V/ B; ~4 Z5 k( Y9 c7 T+ ?
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|Shenzhen Lianshi Electronics Co., Ltd
( 粤ICP备13003189号 )
发表于 2022-3-29 21:22:13