Device Structure 3 G0 I( l7 s. p" W6 y+ v7 _
◆ CMOS image sensor
2 Y! N4 N3 Y5 A( }+ E◆ Image size Diagonal 11.1 mm (Type 2/3) Approx. 5.07 M pixels All-pixel Diagonal 7.7 mm (Type 1/2.35) Approx. 2.11 M pixels 1080p-Full HD % f) d1 j! `) K* N: E
◆ Total number of pixels 2464 (H) × 2066 (V) Approx. 5.09 M pixels
& u) i; a+ V4 h f9 g' i5 Y◆ Number of effective pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels
n1 S; i( d4 S3 ^7 y" J+ L◆ Number of active pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels & Y$ |8 ], R6 J% }9 ]( s9 l
◆ Number of recommended recording pixels 2448 (H) × 2048 (V) Approx. 5.01 M pixels All-pixel 1920 (H) × 1080 (V) Approx. 2.07 M pixels 1080p-Full HD 1 k% I. Y2 s( w* t
◆ Unit cell size 3.45 µm (H) × 3.45 µm (V)
! ~- t# G: Z' o9 z◆ Optical black Horizontal (H) direction: Front 0 pixels, rear 0 pixels Vertical (V) direction: Front 10 pixels, rear 0 pixels
- [; z! k* P& M! I. B% t, D◆ Substrate material Silicon
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Features
/ _7 d7 p. J3 b. q. F9 E◆ CMOS active pixel type dots
: r- P2 G" p6 H. K◆ Built-in timing adjustment circuit, H/V driver and serial communication circuit ( E/ X- x8 Y6 t4 ~; V3 c5 |( o4 q% j
◆ Global shutter function ' W3 k( L! d* W( T0 l
◆ Input frequency 37.125 MHz / 74.25 MHz / 54MHz
2 S8 J2 k, n' j◆ Number of recommended recording pixels: 2448 (H) × 2048 (V) approx. 5.01 M pixels ( y w7 W8 Q- K0 x, n+ Q
Readout mode
' p, x, S, c& _9 K% n& `; X* JAll-pixel scan mode
- }0 {4 W3 s( }3 _! L6 p, k$ i: J Y1080p-Full HD readout mode
* u7 Z, w- [) SVertical / Horizontal 1 / 2 Subsampling mode
2 Q& o. N4 U: b. ~. _$ p& aVertical 2-pixel FD Binning mode ROI mode $ K6 m0 n' F( k# K! c
Vertical / Horizontal‐Normal / Inverted readout mode
5 T! y/ a8 R d- }0 y- ]2 V◆ Readout rate 2 E% g' O; ]5 v2 I8 q
Maximum frame rate in
& Q- _0 g! ^5 J/ q. }2 `/ l9 ^All-pixel scan mode: 8 bit 163.4 frame/s, 10 bit:144.7 frame/s, 12 bit:89.5 frame/s 3 |* f, d& y2 E1 p/ M
◆ Variable-speed shutter function (resolution 1 H units)
" }' J" }4 c" K◆ 8-bit / 10-bit / 12-bit A/D converter
$ J3 Q4 E! ?" M1 b◆ CDS / PGA function 0 dB to 24 dB: Analog Gain (0.1 dB step) 24.1 dB to 48 dB: Analog Gain: 24 dB + Digital Gain: 0.1 dB to 24 dB (0.1 dB step)
- K8 B3 d/ [* A/ ~. D/ J' ]" N◆ I/O interface Low voltage LVDS (150 mVp-p) serial (4 ch / 8 ch / 16ch switching) DDR output
" n: N9 \/ f, c◆ Recommended lens F number: 2.8 or more (Close side)
! `& P9 R& E/ F4 i2 i◆ Recommended exit pupil distance: –100 mm to –∞
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|Shenzhen Lianshi Electronics Co., Ltd
( 粤ICP备13003189号 )
发表于 2022-3-29 21:22:13