Device Structure
5 ~! I0 p A% \$ V7 j2 f◆ CMOS image sensor
# ~6 r- A( F% @. B; \& @0 X◆ Image size Diagonal 11.1 mm (Type 2/3) Approx. 5.07 M pixels All-pixel Diagonal 7.7 mm (Type 1/2.35) Approx. 2.11 M pixels 1080p-Full HD 2 N3 h, d/ T4 G
◆ Total number of pixels 2464 (H) × 2066 (V) Approx. 5.09 M pixels ; O7 Y% [- o, N3 n
◆ Number of effective pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels
* ]7 [9 T" @0 P$ Q* G- K8 r. H◆ Number of active pixels 2464 (H) × 2056 (V) Approx. 5.07 M pixels
3 o, N; M/ |7 C: s- E( k, U2 y◆ Number of recommended recording pixels 2448 (H) × 2048 (V) Approx. 5.01 M pixels All-pixel 1920 (H) × 1080 (V) Approx. 2.07 M pixels 1080p-Full HD
* ?0 R; [3 U# l5 e; n, V- R; D◆ Unit cell size 3.45 µm (H) × 3.45 µm (V) 1 @0 R$ Q6 P: k( M
◆ Optical black Horizontal (H) direction: Front 0 pixels, rear 0 pixels Vertical (V) direction: Front 10 pixels, rear 0 pixels & w4 R: H: P( y. q2 K& |* o
◆ Substrate material Silicon) U0 g y0 X* F! T
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Features
0 g2 ~- i+ O7 G2 S- q! J! T◆ CMOS active pixel type dots + f' _ o* N7 U1 c7 ]. [
◆ Built-in timing adjustment circuit, H/V driver and serial communication circuit
4 P/ e+ f- Q0 _, B8 H◆ Global shutter function 6 O0 N {1 C) w/ m* o1 a7 |
◆ Input frequency 37.125 MHz / 74.25 MHz / 54MHz
B1 p% r; `, k* B7 Q◆ Number of recommended recording pixels: 2448 (H) × 2048 (V) approx. 5.01 M pixels
7 @6 i0 ~- @; YReadout mode
Z Q9 J4 {0 g/ \& c1 a5 tAll-pixel scan mode
% R& e- F. J3 ^+ P8 X0 J9 t- u9 n& f1080p-Full HD readout mode
$ s9 `: ^: m5 T" t9 z0 u) QVertical / Horizontal 1 / 2 Subsampling mode 2 ^* W/ A' `* o7 g
Vertical 2-pixel FD Binning mode ROI mode * O5 k2 I9 _/ m% U. m2 u
Vertical / Horizontal‐Normal / Inverted readout mode
. v, j0 C5 e; j. K' a- c ]◆ Readout rate Q/ D3 u0 M8 H) _; X) }
Maximum frame rate in
& f2 p# [, Z5 |2 pAll-pixel scan mode: 8 bit 163.4 frame/s, 10 bit:144.7 frame/s, 12 bit:89.5 frame/s 1 [' ? F! g# k% {
◆ Variable-speed shutter function (resolution 1 H units)
8 ~# t8 u& j$ ]# s◆ 8-bit / 10-bit / 12-bit A/D converter
: `' A$ W* ^3 Q. u! ~2 p◆ CDS / PGA function 0 dB to 24 dB: Analog Gain (0.1 dB step) 24.1 dB to 48 dB: Analog Gain: 24 dB + Digital Gain: 0.1 dB to 24 dB (0.1 dB step) ) ?0 F; B3 X" y* J( i
◆ I/O interface Low voltage LVDS (150 mVp-p) serial (4 ch / 8 ch / 16ch switching) DDR output ( v, c8 S o4 F, T! M+ l" J6 J# |
◆ Recommended lens F number: 2.8 or more (Close side) 5 C6 e& _ H, k& e" p
◆ Recommended exit pupil distance: –100 mm to –∞
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|Shenzhen Lianshi Electronics Co., Ltd
( 粤ICP备13003189号 )
发表于 2022-3-29 21:22:13